In WSL, copy it from your windows downloads to it’s own folder: cd ~Ĭp WinDownloads/ petalinux On windows, go to the petalinux download page and download petalinux 2019.2.
#Vivado download bif install
Install all the (many) dependencies: sudo apt-get install -y gcc git make net-tools libncursesw5-dev tftpd zlib1g-dev libssl-dev flex bison libselinux1 gnupg wget diffstat chrpath socat xterm autoconf libtool tar unzip texinfo gcc-multilib build-essential libsdl1.2-dev libglib2.0-dev zlib1g:i386 screen pax gzip gawk glibc-doc:i386 locales:i386 ncurses-dev qemu-system-arm:i386 ncurses-dev:i386 libstdc++6:i386 libselinux1:i386 lib32ncurses5-dev Link your Vivado workspace: sudo ln -s /mnt/c/ ~/VivadoĪdd 32-bit apps to apt-get sudo dpkg -add-architecture i386 Link your downloads folder (this will come in handy later): sudo ln -s /mnt/c/Users//Downloads ~/WinDownloads
#Vivado download bif manual
The instructions for installing WSL can be found here.įollow the manual installation steps as far as choosing your linux distro, then make sure you choose 16.04 LTS.įire up WSL and run the following commands. No, it doesn’t work on later versions of Ubuntu. Yes, it’s annoying that this has to be 16.04 LTS, especially if you already have WSL enabled.
But Petalinux is a temperamental child which will throw it’s toys out of the pram at the slightest inconvenience, and thus we need to make sure it’s happy. We’re using the Xilinx Zynq SoCs, and the obvious choice of embedded linux OS for these absolute * beasts* is Petalinux – what a shock, it’s in the title.
#Vivado download bif software
You already have the Xilinx Vivado and Vitis software installed (in my case it’s the 2019.2 version and that is what these instructions will work for – no it doesn’t work on the 2020 distributions).You’re a competent user of computers and can navigate both windows and linux via the command line.Okay so if you’re following this tutorial I’m going to assume the following: Try_1/try_1.runs/impl_1/add_bram_wrapper.bit Click on Generate Block Design:Īfter that is done generating, right click on the block design you have created and select Create HDL Wrapper, this will set the created block design as top module:Ĭheck the address map of the BRAM slave memory so we can use the same address in software later: Now add another block - the AXI BRAM controller:Ĭlick on Run Connection Automation and connect the S_AXI port of BRAM controller with M_AXI_HPM0 port of PS:Ĭlick on Run Connection Automation again and connect BRAM_PORTA to a block ram:ĭouble click the BRAM controller and configure it to only have 1 BRAM interface:ĭouble click the PS block, select ``PS-PL Configuration``` and configure it to only enable HPM0 (unselect HPM1): This will configure the PS block correctly for SOM + Carrier Card: Once the PS block is added, make sure to click Run Block Automation and apply the board preset. In Block Design, click on the + sign, and add PS block: Then choose RTL project:Ĭlick next, then choose boards in Default Part section, choose K26* card, and then click on connections:Ĭhoose the carrier card to connect the SOM to, in this case the Vision AI Starter Kit carrier card:Ĭlick through to finish creating the project.
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